From the circuit in Figure 2 transistor M1 and M2 per pair of images in the difference (Differential Pair), with I_1, I_2 =/flow of M1 and M2 have a drain value. as a result, the estimated value of I1/2 V _ V _ GS GS 1 and 2 according to the cycle of the signal (Voltage Follower) prowess have similar values as well, so when level access port V_in prowess has V_y Y = X, making prowess at port V_in levels up with a prowess V_in prowess 〗 〖 V_x/V transmission _y. With these equations (18)
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